Atrenta Introduces First Low-Power RTL Predictive Analysis Capability; Now designers can optimize for power early in the design cycle
SAN JOSE, Calif.--(BUSINESS WIRE)--May 19, 2003--Atrenta(TM) Inc.,
the Predictive Analysis Company, is introducing SpyGlass(R) LP to
address the need to optimize designs for low power from the outset at
RTL. SpyGlass LP enables users to create power-efficient RTL, early in
the design cycle, thereby eliminating much of the iterations now
common to optimize for power consumption later in the design cycle.
The product provides guidance for low power techniques targeting
dynamic power, leakage power, and voltage management issues. This is
the first product that helps designers deploy low power design
methodology and techniques at RTL.
"Power aware design has become critical for wireless as well as
wired applications and advances in device technology are presenting
new challenges in power minimization," stated Anantha Chandrakasan,
Professor of EECS at the Massachusetts Institute of Technology. "In
order to get power efficient designs, low power techniques need to be
incorporated from the beginning. The quality of RTL code is very
important for downstream optimizations targeting lower power designs.
Atrenta's predictive analysis techniques can help create power
efficient RTL and enable designers to deploy their low power design
methodology."
"There is an ever increasing need to reduce power consumption in
not only wireless and portable devices but also non-portable devices
due to cooling challenges," stated Ghulam Nurie, Senior Vice
President, Marketing & Business Development, Atrenta. "Atrenta's
SpyGlass LP helps design engineers apply low power techniques from the
start when the design is being coded in RTL. By having the RTL
designed for low power, you get even better results with downstream
power optimization tools. Furthermore, with its built-in
knowledge-base of low power design techniques, SpyGlass LP effectively
makes every engineer in the design team into a low power design
expert."
Fast Synthesis Key to Power Analysis
Estimating power consumption and designing for low power at RTL is
very difficult because power usage is dependent on the actual
structure. SpyGlass' built-in fast synthesis engine quickly
synthesizes the RTL into the detailed structure level required to
accurately determine areas of focus for low power design needs. With
the detailed structural level information available to it, SpyGlass
can accurately identify logic structures that should be modified for
more efficient power utilization.
Dynamic Power Guidance
SpyGlass LP provides dynamic power guidance in several ways,
particularly in the area of clocks. Clock nets account for a large
proportion of dynamic power consumption. While clock gating is seen as
a useful technique for reducing clock power consumption, looking for
clock gating candidates in a given design remains a challenging
problem. SpyGlass analyses each flop in the design and uses designer
assisted heuristics to come up with the likely gating candidates. It
also provides a unique capability by helping designers visualize
impact of gated clocks in a given design.
SpyGlass also provides a number of techniques that target
datapath, control, busses, and memory units in the design to help
guide the RTL towards a good starting point for low power
implementation. SpyGlass LP provides guidance on a number of datapath
oriented techniques such as the possible use of latches where power
hungry units are selectively used and points out possible application
of pre-computation. It also examines FSM (Finite State Machine)
controllers to ensure that low power design guidelines are followed
and provides detailed information on FSMs including issues such as
unreachable, dead states, and possible recoding of machines to reduce
power consumption.
Voltage Management
A major issue in 0.13-micron and more advanced processes is
leakage power. Due to increasing power leakage in existing and future
process technologies, multiple voltage (power) domains are often
employed to address leakage and voltage scaling needs. This low power
design methodology introduces a host of issues that need to be checked
at the system level. SpyGlass helps visualize voltage (power) domains
at RTL, checks for issues related to signals crossing voltage domain
boundaries, and ensures that special design guidelines are being
adhered to with respect to different voltage domains.
Availability
SpyGlass LP is in Beta testing with customers. Production
shipments are expected in the 3rd quarter of 2003.
About SpyGlass
SpyGlass(R) uses a unique predictive analysis technique to perform
detailed structural analysis on Verilog and VHDL RTL in order to
detect complex design problems early in the design cycle, resulting in
reduced development costs, lower risk and faster time to market.
SpyGlass' fast-synthesis engine creates a structural representation of
the design allowing the most comprehensive and accurate analysis of
RTL to detect problems not normally visible in the RTL. Problems
detected include clock domain crossings, synchronization, and timing
issues, testability problems, SoC integration requirements,
RTL-handoff, design reuse, clock/reset requirements, and coding
styles. SpyGlass quickly pinpoints critical problems not generally
found until after lengthy simulation and synthesis runs, such as
combinational loops, levels of logic and fanout violations, tri-state
bus decoding errors, inefficient use of resources and much more.
SpyGlass was selected by EDN magazine as one of the Top 100 products
for 2002 and also received the "LSI Design of The Year 2002" award by
Japan's Semiconductor Industry News.
About Atrenta
Atrenta's unique Predictive Analysis technology accelerates the
design of SoCs, ASICs and FPGAs by analyzing downstream requirements
upfront. Its award-winning SpyGlass family of predictive analysis
products performs detailed structural analysis at design creation
stage (Verilog and VHDL RTL) to detect complex design problems that
are not easily detected with conventional verification methods.
SpyGlass has been widely adopted by more than 50 of the world's
leading electronics companies, including eight of the top ten
semiconductor companies. Atrenta was chosen by Venture Reporter as one
of the top 100 venture-backed companies for 2002.
Atrenta employs over one hundred people worldwide and is
headquartered in San Jose, California, with European offices in
England and France, a research and development center in India, and
sales and support distributors in Central Europe, India, Israel,
Japan, Korea, Singapore, Taiwan, and United Kingdom. For further
information, visit the Atrenta website at www.atrenta.com, email
moreinfo@atrenta.com, or call 408-453-3333.
Note to Editors: Atrenta and SpyGlass are registered trademarks of
Atrenta Inc. All other trademarks belong to their respective owners.
CONTACT: Atrenta Inc.
Mona Singh, 408/467-4248
mona@atrenta.com
or
Newiic
Paula Jones, 650/967-3711
paula@newiic.com
